Reformat jsimdcpu[-64].asm to improve readability
This commit is contained in:
DRC
@@ -20,8 +20,8 @@
|
||||
%include "jsimdext.inc"
|
||||
|
||||
; --------------------------------------------------------------------------
|
||||
SECTION SEG_TEXT
|
||||
BITS 64
|
||||
SECTION SEG_TEXT
|
||||
BITS 64
|
||||
;
|
||||
; Check if the CPU supports SIMD instructions
|
||||
;
|
||||
@@ -29,34 +29,34 @@
|
||||
; jpeg_simd_cpu_support (void)
|
||||
;
|
||||
|
||||
align 32
|
||||
global EXTN(jpeg_simd_cpu_support)
|
||||
align 32
|
||||
global EXTN(jpeg_simd_cpu_support)
|
||||
|
||||
EXTN(jpeg_simd_cpu_support):
|
||||
push rbx
|
||||
push rdi
|
||||
push rbx
|
||||
push rdi
|
||||
|
||||
xor rdi,rdi ; simd support flag
|
||||
xor rdi, rdi ; simd support flag
|
||||
|
||||
; Check for AVX2 instruction support
|
||||
mov rax, 7
|
||||
xor rcx,rcx
|
||||
cpuid
|
||||
mov rax,rbx ; rax = Extended feature flags
|
||||
; Check for AVX2 instruction support
|
||||
mov rax, 7
|
||||
xor rcx, rcx
|
||||
cpuid
|
||||
mov rax, rbx ; rax = Extended feature flags
|
||||
|
||||
or rdi, JSIMD_SSE2
|
||||
or rdi, JSIMD_SSE
|
||||
test rax, 1<<5 ; bit5:AVX2
|
||||
jz short .return
|
||||
or rdi, JSIMD_AVX2
|
||||
or rdi, JSIMD_SSE2
|
||||
or rdi, JSIMD_SSE
|
||||
test rax, 1<<5 ; bit5:AVX2
|
||||
jz short .return
|
||||
or rdi, JSIMD_AVX2
|
||||
|
||||
.return:
|
||||
mov rax,rdi
|
||||
mov rax, rdi
|
||||
|
||||
pop rdi
|
||||
pop rbx
|
||||
ret
|
||||
pop rdi
|
||||
pop rbx
|
||||
ret
|
||||
|
||||
; For some reason, the OS X linker does not honor the request to align the
|
||||
; segment unless we do this.
|
||||
align 32
|
||||
align 32
|
||||
|
||||
@@ -19,8 +19,8 @@
|
||||
%include "jsimdext.inc"
|
||||
|
||||
; --------------------------------------------------------------------------
|
||||
SECTION SEG_TEXT
|
||||
BITS 32
|
||||
SECTION SEG_TEXT
|
||||
BITS 32
|
||||
;
|
||||
; Check if the CPU supports SIMD instructions
|
||||
;
|
||||
@@ -28,88 +28,88 @@
|
||||
; jpeg_simd_cpu_support (void)
|
||||
;
|
||||
|
||||
align 32
|
||||
global EXTN(jpeg_simd_cpu_support)
|
||||
align 32
|
||||
global EXTN(jpeg_simd_cpu_support)
|
||||
|
||||
EXTN(jpeg_simd_cpu_support):
|
||||
push ebx
|
||||
; push ecx ; need not be preserved
|
||||
; push edx ; need not be preserved
|
||||
; push esi ; unused
|
||||
push edi
|
||||
push ebx
|
||||
; push ecx ; need not be preserved
|
||||
; push edx ; need not be preserved
|
||||
; push esi ; unused
|
||||
push edi
|
||||
|
||||
xor edi,edi ; simd support flag
|
||||
xor edi, edi ; simd support flag
|
||||
|
||||
pushfd
|
||||
pop eax
|
||||
mov edx,eax
|
||||
xor eax, 1<<21 ; flip ID bit in EFLAGS
|
||||
push eax
|
||||
popfd
|
||||
pushfd
|
||||
pop eax
|
||||
xor eax,edx
|
||||
jz short .return ; CPUID is not supported
|
||||
pushfd
|
||||
pop eax
|
||||
mov edx, eax
|
||||
xor eax, 1<<21 ; flip ID bit in EFLAGS
|
||||
push eax
|
||||
popfd
|
||||
pushfd
|
||||
pop eax
|
||||
xor eax, edx
|
||||
jz short .return ; CPUID is not supported
|
||||
|
||||
; Check for MMX instruction support
|
||||
xor eax,eax
|
||||
cpuid
|
||||
test eax,eax
|
||||
jz short .return
|
||||
; Check for MMX instruction support
|
||||
xor eax, eax
|
||||
cpuid
|
||||
test eax, eax
|
||||
jz short .return
|
||||
|
||||
xor eax,eax
|
||||
inc eax
|
||||
cpuid
|
||||
mov eax,edx ; eax = Standard feature flags
|
||||
xor eax, eax
|
||||
inc eax
|
||||
cpuid
|
||||
mov eax, edx ; eax = Standard feature flags
|
||||
|
||||
test eax, 1<<23 ; bit23:MMX
|
||||
jz short .no_mmx
|
||||
or edi, byte JSIMD_MMX
|
||||
test eax, 1<<23 ; bit23:MMX
|
||||
jz short .no_mmx
|
||||
or edi, byte JSIMD_MMX
|
||||
.no_mmx:
|
||||
test eax, 1<<25 ; bit25:SSE
|
||||
jz short .no_sse
|
||||
or edi, byte JSIMD_SSE
|
||||
test eax, 1<<25 ; bit25:SSE
|
||||
jz short .no_sse
|
||||
or edi, byte JSIMD_SSE
|
||||
.no_sse:
|
||||
test eax, 1<<26 ; bit26:SSE2
|
||||
jz short .no_sse2
|
||||
or edi, byte JSIMD_SSE2
|
||||
test eax, 1<<26 ; bit26:SSE2
|
||||
jz short .no_sse2
|
||||
or edi, byte JSIMD_SSE2
|
||||
.no_sse2:
|
||||
|
||||
; Check for AVX2 instruction support
|
||||
mov eax, 7
|
||||
xor ecx,ecx
|
||||
cpuid
|
||||
mov eax,ebx
|
||||
test eax, 1<<5 ; bit5:AVX2
|
||||
jz short .no_avx2
|
||||
or edi, JSIMD_AVX2
|
||||
; Check for AVX2 instruction support
|
||||
mov eax, 7
|
||||
xor ecx, ecx
|
||||
cpuid
|
||||
mov eax, ebx
|
||||
test eax, 1<<5 ; bit5:AVX2
|
||||
jz short .no_avx2
|
||||
or edi, JSIMD_AVX2
|
||||
.no_avx2:
|
||||
|
||||
; Check for 3DNow! instruction support
|
||||
mov eax, 0x80000000
|
||||
cpuid
|
||||
cmp eax, 0x80000000
|
||||
jbe short .return
|
||||
; Check for 3DNow! instruction support
|
||||
mov eax, 0x80000000
|
||||
cpuid
|
||||
cmp eax, 0x80000000
|
||||
jbe short .return
|
||||
|
||||
mov eax, 0x80000001
|
||||
cpuid
|
||||
mov eax,edx ; eax = Extended feature flags
|
||||
mov eax, 0x80000001
|
||||
cpuid
|
||||
mov eax, edx ; eax = Extended feature flags
|
||||
|
||||
test eax, 1<<31 ; bit31:3DNow!(vendor independent)
|
||||
jz short .no_3dnow
|
||||
or edi, byte JSIMD_3DNOW
|
||||
test eax, 1<<31 ; bit31:3DNow!(vendor independent)
|
||||
jz short .no_3dnow
|
||||
or edi, byte JSIMD_3DNOW
|
||||
.no_3dnow:
|
||||
|
||||
.return:
|
||||
mov eax,edi
|
||||
mov eax, edi
|
||||
|
||||
pop edi
|
||||
; pop esi ; unused
|
||||
; pop edx ; need not be preserved
|
||||
; pop ecx ; need not be preserved
|
||||
pop ebx
|
||||
ret
|
||||
pop edi
|
||||
; pop esi ; unused
|
||||
; pop edx ; need not be preserved
|
||||
; pop ecx ; need not be preserved
|
||||
pop ebx
|
||||
ret
|
||||
|
||||
; For some reason, the OS X linker does not honor the request to align the
|
||||
; segment unless we do this.
|
||||
align 32
|
||||
align 32
|
||||
|
||||
Reference in New Issue
Block a user