ace9d06b9e
git-svn-id: svn://svn.code.sf.net/p/libjpeg-turbo/code/trunk@1466 632fc199-4ca6-4c93-a231-07263d6284db
226 lines
7.2 KiB
C
226 lines
7.2 KiB
C
/*
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* AltiVec optimizations for libjpeg-turbo
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*
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* Copyright (C) 2014, D. R. Commander.
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* All rights reserved.
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*/
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/* SLOW INTEGER FORWARD DCT */
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#include "jsimd_altivec.h"
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#define F_0_298 2446 /* FIX(0.298631336) */
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#define F_0_390 3196 /* FIX(0.390180644) */
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#define F_0_541 4433 /* FIX(0.541196100) */
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#define F_0_765 6270 /* FIX(0.765366865) */
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#define F_0_899 7373 /* FIX(0.899976223) */
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#define F_1_175 9633 /* FIX(1.175875602) */
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#define F_1_501 12299 /* FIX(1.501321110) */
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#define F_1_847 15137 /* FIX(1.847759065) */
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#define F_1_961 16069 /* FIX(1.961570560) */
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#define F_2_053 16819 /* FIX(2.053119869) */
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#define F_2_562 20995 /* FIX(2.562915447) */
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#define F_3_072 25172 /* FIX(3.072711026) */
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#define CONST_BITS 13
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#define PASS1_BITS 2
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#define DESCALE_P1 (CONST_BITS - PASS1_BITS)
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#define DESCALE_P2 (CONST_BITS + PASS1_BITS)
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#define DO_FDCT_COMMON(PASS) \
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{ \
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tmp1312l = vec_mergeh(tmp13, tmp12); \
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tmp1312h = vec_mergel(tmp13, tmp12); \
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\
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out2l = vec_msums(tmp1312l, pw_f130_f054, pd_descale_p##PASS); \
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out2h = vec_msums(tmp1312h, pw_f130_f054, pd_descale_p##PASS); \
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out6l = vec_msums(tmp1312l, pw_f054_mf130, pd_descale_p##PASS); \
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out6h = vec_msums(tmp1312h, pw_f054_mf130, pd_descale_p##PASS); \
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\
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out2l = vec_sra(out2l, descale_p##PASS); \
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out2h = vec_sra(out2h, descale_p##PASS); \
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out6l = vec_sra(out6l, descale_p##PASS); \
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out6h = vec_sra(out6h, descale_p##PASS); \
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\
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out2 = vec_pack(out2l, out2h); \
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out6 = vec_pack(out6l, out6h); \
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\
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/* Odd part */ \
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\
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z3 = vec_add(tmp4, tmp6); \
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z4 = vec_add(tmp5, tmp7); \
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\
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z34l = vec_mergeh(z3, z4); \
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z34h = vec_mergel(z3, z4); \
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\
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z3l = vec_msums(z34l, pw_mf078_f117, pd_descale_p##PASS); \
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z3h = vec_msums(z34h, pw_mf078_f117, pd_descale_p##PASS); \
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z4l = vec_msums(z34l, pw_f117_f078, pd_descale_p##PASS); \
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z4h = vec_msums(z34h, pw_f117_f078, pd_descale_p##PASS); \
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\
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tmp47l = vec_mergeh(tmp4, tmp7); \
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tmp47h = vec_mergel(tmp4, tmp7); \
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\
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out7l = vec_msums(tmp47l, pw_mf060_mf089, z3l); \
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out7h = vec_msums(tmp47h, pw_mf060_mf089, z3h); \
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out1l = vec_msums(tmp47l, pw_mf089_f060, z4l); \
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out1h = vec_msums(tmp47h, pw_mf089_f060, z4h); \
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\
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out7l = vec_sra(out7l, descale_p##PASS); \
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out7h = vec_sra(out7h, descale_p##PASS); \
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out1l = vec_sra(out1l, descale_p##PASS); \
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out1h = vec_sra(out1h, descale_p##PASS); \
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\
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out7 = vec_pack(out7l, out7h); \
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out1 = vec_pack(out1l, out1h); \
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\
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tmp56l = vec_mergeh(tmp5, tmp6); \
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tmp56h = vec_mergel(tmp5, tmp6); \
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\
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out5l = vec_msums(tmp56l, pw_mf050_mf256, z4l); \
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out5h = vec_msums(tmp56h, pw_mf050_mf256, z4h); \
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out3l = vec_msums(tmp56l, pw_mf256_f050, z3l); \
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out3h = vec_msums(tmp56h, pw_mf256_f050, z3h); \
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\
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out5l = vec_sra(out5l, descale_p##PASS); \
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out5h = vec_sra(out5h, descale_p##PASS); \
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out3l = vec_sra(out3l, descale_p##PASS); \
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out3h = vec_sra(out3h, descale_p##PASS); \
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\
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out5 = vec_pack(out5l, out5h); \
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out3 = vec_pack(out3l, out3h); \
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}
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#define DO_FDCT_ROWS() \
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{ \
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/* Even part */ \
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\
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tmp10 = vec_add(tmp0, tmp3); \
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tmp13 = vec_sub(tmp0, tmp3); \
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tmp11 = vec_add(tmp1, tmp2); \
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tmp12 = vec_sub(tmp1, tmp2); \
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\
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out0 = vec_add(tmp10, tmp11); \
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out0 = vec_sl(out0, pass1_bits); \
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out4 = vec_sub(tmp10, tmp11); \
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out4 = vec_sl(out4, pass1_bits); \
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\
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DO_FDCT_COMMON(1); \
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}
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#define DO_FDCT_COLS() \
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{ \
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/* Even part */ \
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\
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tmp10 = vec_add(tmp0, tmp3); \
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tmp13 = vec_sub(tmp0, tmp3); \
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tmp11 = vec_add(tmp1, tmp2); \
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tmp12 = vec_sub(tmp1, tmp2); \
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\
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out0 = vec_add(tmp10, tmp11); \
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out0 = vec_add(out0, pw_descale_p2x); \
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out0 = vec_sra(out0, pass1_bits); \
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out4 = vec_sub(tmp10, tmp11); \
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out4 = vec_add(out4, pw_descale_p2x); \
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out4 = vec_sra(out4, pass1_bits); \
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\
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DO_FDCT_COMMON(2); \
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}
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void
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jsimd_fdct_islow_altivec (DCTELEM *data)
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{
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__vector short row0, row1, row2, row3, row4, row5, row6, row7,
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col0, col1, col2, col3, col4, col5, col6, col7,
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tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp10, tmp11, tmp12, tmp13,
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tmp47l, tmp47h, tmp56l, tmp56h, tmp1312l, tmp1312h,
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z3, z4, z34l, z34h,
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out0, out1, out2, out3, out4, out5, out6, out7;
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__vector int z3l, z3h, z4l, z4h,
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out1l, out1h, out2l, out2h, out3l, out3h, out5l, out5h, out6l, out6h,
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out7l, out7h;
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/* Constants */
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__vector short
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pw_f130_f054 = { __4X2(F_0_541 + F_0_765, F_0_541) },
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pw_f054_mf130 = { __4X2(F_0_541, F_0_541 - F_1_847) },
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pw_mf078_f117 = { __4X2(F_1_175 - F_1_961, F_1_175) },
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pw_f117_f078 = { __4X2(F_1_175, F_1_175 - F_0_390) },
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pw_mf060_mf089 = { __4X2(F_0_298 - F_0_899, -F_0_899) },
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pw_mf089_f060 = { __4X2(-F_0_899, F_1_501 - F_0_899) },
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pw_mf050_mf256 = { __4X2(F_2_053 - F_2_562, -F_2_562) },
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pw_mf256_f050 = { __4X2(-F_2_562, F_3_072 - F_2_562) },
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pw_descale_p2x = { __8X(1 << (PASS1_BITS - 1)) };
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__vector unsigned short pass1_bits = { __8X(PASS1_BITS) };
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__vector int pd_descale_p1 = { __4X(1 << (DESCALE_P1 - 1)) },
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pd_descale_p2 = { __4X(1 << (DESCALE_P2 - 1)) };
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__vector unsigned int descale_p1 = { __4X(DESCALE_P1) },
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descale_p2 = { __4X(DESCALE_P2) };
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/* Pass 1: process rows */
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row0 = *(__vector short *)&data[0];
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row1 = *(__vector short *)&data[8];
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row2 = *(__vector short *)&data[16];
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row3 = *(__vector short *)&data[24];
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row4 = *(__vector short *)&data[32];
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row5 = *(__vector short *)&data[40];
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row6 = *(__vector short *)&data[48];
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row7 = *(__vector short *)&data[56];
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TRANSPOSE(row, col);
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tmp0 = vec_add(col0, col7);
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tmp7 = vec_sub(col0, col7);
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tmp1 = vec_add(col1, col6);
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tmp6 = vec_sub(col1, col6);
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tmp2 = vec_add(col2, col5);
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tmp5 = vec_sub(col2, col5);
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tmp3 = vec_add(col3, col4);
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tmp4 = vec_sub(col3, col4);
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DO_FDCT_ROWS();
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/* Pass 2: process columns */
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TRANSPOSE(out, row);
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tmp0 = vec_add(row0, row7);
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tmp7 = vec_sub(row0, row7);
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tmp1 = vec_add(row1, row6);
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tmp6 = vec_sub(row1, row6);
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tmp2 = vec_add(row2, row5);
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tmp5 = vec_sub(row2, row5);
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tmp3 = vec_add(row3, row4);
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tmp4 = vec_sub(row3, row4);
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DO_FDCT_COLS();
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*(__vector short *)&data[0] = out0;
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*(__vector short *)&data[8] = out1;
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*(__vector short *)&data[16] = out2;
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*(__vector short *)&data[24] = out3;
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*(__vector short *)&data[32] = out4;
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*(__vector short *)&data[40] = out5;
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*(__vector short *)&data[48] = out6;
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*(__vector short *)&data[56] = out7;
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}
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