a2e6a9dd47
Independent JPEG Group's JPEG software release 6b with x86 SIMD extension for IJG JPEG library version 1.02
131 lines
3.5 KiB
NASM
131 lines
3.5 KiB
NASM
;
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; jsimddjg.asm - SIMD instruction support check (for DJGPP V.2)
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;
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; x86 SIMD extension for IJG JPEG library
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; Copyright (C) 1999-2006, MIYASAKA Masaru.
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; For conditions of distribution and use, see copyright notice in jsimdext.inc
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;
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; This file should be assembled with NASM (Netwide Assembler),
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; can *not* be assembled with Microsoft's MASM or any compatible
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; assembler (including Borland's Turbo Assembler).
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; NASM is available from http://nasm.sourceforge.net/ or
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; http://sourceforge.net/project/showfiles.php?group_id=6208
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;
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; Last Modified : September 26, 2004
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;
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; [TAB8]
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%include "jsimdext.inc"
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; --------------------------------------------------------------------------
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SECTION SEG_TEXT
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BITS 32
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;
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; Check if the OS supports SIMD instructions (DJGPP V.2)
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;
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; GLOBAL(unsigned int)
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; jpeg_simd_os_support (unsigned int simd)
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;
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%define EXCEPTION_ILLEGAL_INSTRUCTION 6 ; vector number of #UD
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%define simd ebp+8 ; unsigned int simd
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%define mxcsr ebp-4 ; unsigned int mxcsr = 0x1F80
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align 16
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global EXTN(jpeg_simd_os_support)
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EXTN(jpeg_simd_os_support):
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push ebp
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mov ebp,esp
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push dword 0x1F80 ; default value of MXCSR register
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push ebx
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push DWORD [simd] ; simd_flags - modified from exception_handler
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mov bl, EXCEPTION_ILLEGAL_INSTRUCTION
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mov ax, 0x0202 ; Get Processor Exception Handler Vector
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int 0x31 ; DPMI function call
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push ecx ; selector of old exception handler
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push edx ; offset of old exception handler
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mov ecx,cs
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mov edx, exception_handler
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mov bl, EXCEPTION_ILLEGAL_INSTRUCTION
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mov ax, 0x0203 ; Set Processor Exception Handler Vector
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int 0x31 ; DPMI function call
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mov eax, DWORD [simd]
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; If floating point emulation is enabled (CR0.EM = 1),
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; executing an MMX/3DNow! instruction generates invalid
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; opcode exception (#UD).
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push byte (.mmx_1 - .mmx_0) ; inst_bytes
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push byte (JSIMD_MMX | JSIMD_3DNOW) ; test_flags
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test eax, DWORD [esp]
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jz short .mmx_1
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.mmx_0: emms ; executing MMX instruction
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.mmx_1: add esp, byte 8
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push byte (.sse_1 - .sse_0)
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push byte (JSIMD_SSE | JSIMD_SSE2)
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test eax, DWORD [esp]
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jz short .sse_1
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.sse_0: ldmxcsr DWORD [mxcsr] ; executing SSE instruction
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.sse_1: add esp, byte 8
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pop edx ; offset of old exception handler
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pop ecx ; selector of old exception handler
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mov bl, EXCEPTION_ILLEGAL_INSTRUCTION
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mov ax, 0x0203 ; Set Processor Exception Handler Vector
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int 0x31 ; DPMI function call
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pop eax ; return simd_flags
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and eax, byte JSIMD_ALL
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pop ebx
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mov esp,ebp
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pop ebp
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ret
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; --------------------------------------------------------------------------
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;
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; LOCAL(void) far
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; exception_handler (unsigned long error_code,
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; void * context_eip, unsigned short context_cs,
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; unsigned long context_eflags,
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; void * context_esp, unsigned short context_ss);
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;
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%define error_code esp+12+8 ; unsigned long error_code
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%define context_eip esp+12+12 ; void * context_eip
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%define context_cs esp+12+16 ; unsigned short context_cs
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%define context_eflags esp+12+20 ; unsigned long context_eflags
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%define context_esp esp+12+24 ; void * context_esp
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%define context_ss esp+12+28 ; unsigned short context_ss
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%define test_flags(b) (b)+0
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%define inst_bytes(b) (b)+4
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%define simd_flags(b) (b)+16
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align 16
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exception_handler:
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push eax
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push ecx
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push edx
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mov eax, POINTER [context_esp]
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mov ecx, DWORD [test_flags(eax)]
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mov edx, DWORD [inst_bytes(eax)]
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not ecx
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add POINTER [context_eip], edx ; next instruction
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and DWORD [simd_flags(eax)], ecx ; turn off flag
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pop edx
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pop ecx
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pop eax
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retf
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