123f7258a8
The IJG convention is to format copyright notices as: Copyright (C) YYYY, Owner. We try to maintain this convention for any code that is part of the libjpeg API library (with the exception of preserving the copyright notices from Cendio's code verbatim, since those predate libjpeg-turbo.) Note that the phrase "All Rights Reserved" is no longer necessary, since all Buenos Aires Convention signatories signed onto the Berne Convention in 2000. However, our convention is to retain this phrase for any files that have a self-contained copyright header but to leave it off of any files that refer to another file for conditions of distribution and use. For instance, all of the non-SIMD files in the libjpeg API library refer to README.ijg, and the copyright message in that file contains "All Rights Reserved", so it is unnecessary to add it to the individual files. The TurboJPEG code retains my preferred formatting convention for copyright notices, which is based on that of VirtualGL (where the TurboJPEG API originated.)
105 lines
2.9 KiB
NASM
105 lines
2.9 KiB
NASM
;
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; jsimdcpu.asm - SIMD instruction support check
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;
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; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
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;
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; Based on the x86 SIMD extension for IJG JPEG library
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; Copyright (C) 1999-2006, MIYASAKA Masaru.
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; For conditions of distribution and use, see copyright notice in jsimdext.inc
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;
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; This file should be assembled with NASM (Netwide Assembler),
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; can *not* be assembled with Microsoft's MASM or any compatible
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; assembler (including Borland's Turbo Assembler).
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; NASM is available from http://nasm.sourceforge.net/ or
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; http://sourceforge.net/project/showfiles.php?group_id=6208
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;
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; [TAB8]
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%include "jsimdext.inc"
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; --------------------------------------------------------------------------
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SECTION SEG_TEXT
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BITS 32
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;
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; Check if the CPU supports SIMD instructions
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;
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; GLOBAL(unsigned int)
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; jpeg_simd_cpu_support (void)
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;
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align 16
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global EXTN(jpeg_simd_cpu_support)
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EXTN(jpeg_simd_cpu_support):
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push ebx
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; push ecx ; need not be preserved
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; push edx ; need not be preserved
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; push esi ; unused
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push edi
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xor edi,edi ; simd support flag
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pushfd
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pop eax
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mov edx,eax
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xor eax, 1<<21 ; flip ID bit in EFLAGS
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push eax
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popfd
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pushfd
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pop eax
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xor eax,edx
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jz short .return ; CPUID is not supported
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; Check for MMX instruction support
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xor eax,eax
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cpuid
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test eax,eax
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jz short .return
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xor eax,eax
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inc eax
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cpuid
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mov eax,edx ; eax = Standard feature flags
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test eax, 1<<23 ; bit23:MMX
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jz short .no_mmx
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or edi, byte JSIMD_MMX
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.no_mmx:
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test eax, 1<<25 ; bit25:SSE
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jz short .no_sse
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or edi, byte JSIMD_SSE
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.no_sse:
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test eax, 1<<26 ; bit26:SSE2
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jz short .no_sse2
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or edi, byte JSIMD_SSE2
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.no_sse2:
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; Check for 3DNow! instruction support
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mov eax, 0x80000000
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cpuid
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cmp eax, 0x80000000
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jbe short .return
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mov eax, 0x80000001
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cpuid
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mov eax,edx ; eax = Extended feature flags
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test eax, 1<<31 ; bit31:3DNow!(vendor independent)
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jz short .no_3dnow
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or edi, byte JSIMD_3DNOW
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.no_3dnow:
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.return:
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mov eax,edi
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pop edi
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; pop esi ; unused
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; pop edx ; need not be preserved
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; pop ecx ; need not be preserved
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pop ebx
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ret
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; For some reason, the OS X linker does not honor the request to align the
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; segment unless we do this.
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align 16
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