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43 Commits

Author SHA1 Message Date
DRC
0d435698f4 AltiVec SIMD implementation of slow integer inverse DCT 
git-svn-id: svn://svn.code.sf.net/p/libjpeg-turbo/code/trunk@1461 632fc199-4ca6-4c93-a231-07263d6284db
 2014-12-20 01:17:39 +00:00
DRC
c7dadd2d0b AltiVec SIMD implementation of fast integer inverse DCT 
git-svn-id: svn://svn.code.sf.net/p/libjpeg-turbo/code/trunk@1445 632fc199-4ca6-4c93-a231-07263d6284db
 2014-12-18 10:12:29 +00:00
DRC
25e40dc42c AltiVec SIMD implementation of slow integer forward DCT; Clean up fast integer forward DCT code so that it is easier to see how it derives from the SSE2 code and to make it play more nicely with the slow FDCT code. 
git-svn-id: svn://svn.code.sf.net/p/libjpeg-turbo/code/trunk@1443 632fc199-4ca6-4c93-a231-07263d6284db
 2014-12-17 08:04:39 +00:00
DRC
a2cc95b827 AltiVec SIMD implementation of fast forward DCT 
git-svn-id: svn://svn.code.sf.net/p/libjpeg-turbo/code/trunk@1405 632fc199-4ca6-4c93-a231-07263d6284db
 2014-09-05 06:33:42 +00:00
DRC
b052d67eb1 ARM NEON SIMD support for YCC-to-RGB565 conversion, and optimizations to the existing YCC-to-RGB conversion code: 
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aee36252be.patch

From aee36252be20054afce371a92406fc66ba6627b5 Mon Sep 17 00:00:00 2001
From: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Date: Wed, 13 Aug 2014 03:50:22 +0300
Subject: [PATCH] ARM: Faster NEON yuv->rgb conversion for Krait and Cortex-A15

The older code was developed and tested only on ARM Cortex-A8 and ARM Cortex-A9.
Tuning it for newer ARM processors can introduce some speed-up (up to 20%).

The performance of the inner loop (conversion of 8 pixels) improves from
~27 cycles down to ~22 cycles on Qualcomm Krait 300, and from ~20 cycles
down to ~18 cycles on ARM Cortex-A15.

The performance remains exactly the same on ARM Cortex-A7 (~58 cycles),
ARM Cortex-A8 (~25 cycles) and ARM Cortex-A9 (~30 cycles) processors.

Also use larger indentation in the source code for separating two independent
instruction streams.

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a5efdbf22c.patch

From a5efdbf22ce9c1acd4b14a353cec863c2c57557e Mon Sep 17 00:00:00 2001
From: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Date: Wed, 13 Aug 2014 07:23:09 +0300
Subject: [PATCH] ARM: NEON optimized yuv->rgb565 conversion

The performance of the inner loop (conversion of 8 pixels):
* ARM Cortex-A7:  ~55 cycles
* ARM Cortex-A8:  ~28 cycles
* ARM Cortex-A9:  ~32 cycles
* ARM Cortex-A15: ~20 cycles
* Qualcomm Krait: ~24 cycles

Based on the Linaro rgb565 patch from
    https://sourceforge.net/p/libjpeg-turbo/patches/24/
but implements better instructions scheduling.


git-svn-id: svn://svn.code.sf.net/p/libjpeg-turbo/code/trunk@1385 632fc199-4ca6-4c93-a231-07263d6284db
 2014-08-23 15:47:51 +00:00
DRC
6263c1fc1b SIMD-accelerated int upsample routine for MIPS DSPr2 2014-05-18 20:04:47 +00:00
DRC
ecfbabdbf3 Fix MIPS build 2014-05-18 19:36:05 +00:00
DRC
f8301c92dd Get rid of the HAVE_PROTOTYPES configuration option, as well as the related JMETHOD and JPP macros. libjpeg-turbo has never supported compilers that don't handle prototypes. Doing so requires ansi2knr, which isn't even supported in the IJG code anymore. 2014-05-16 10:43:44 +00:00
DRC
2c0b793539 Remove all of the NEED_SHORT_EXTERNAL_NAMES stuff. There is scant information available as to which linkers ever had a 15-character global symbol name limit. AFAICT, it might have been a VMS and/or a.out BSD thing, but none of those platforms have ever been supported by libjpeg-turbo (nor are such systems supported by other open source libraries of this nature.) 2014-05-15 20:30:16 +00:00
DRC
99de998e2c SIMD-accelerated NULL convert routine for MIPS DSPr2 2014-05-15 18:26:01 +00:00
DRC
c4c3ac6305 SIMD-accelerated h2v2 smooth downsampling routine for MIPS DSPr2 2014-05-14 15:00:10 +00:00
DRC
38bfd451d5 SIMD-accelerated merged upsampling routines for MIPS DSPr2 2014-05-13 18:40:14 +00:00
DRC
7824f70008 SIMD-accelerated slow integer IDCT routine for MIPS DSPr2 2014-05-06 09:53:21 +00:00
DRC
c6c8c7911f SIMD-accelerated integer convsamp routine for MIPS DSPr2 2013-10-12 21:39:20 +00:00
DRC
3c6b1ba545 SIMD-accelerated floating point quantize and convsamp routines for MIPS DSPr2 2013-10-09 18:39:44 +00:00
DRC
10138c9d35 SIMD-accelerated fast integer inverse DCT routine for MIPS DSPr2 2013-10-08 02:18:59 +00:00
DRC
6addfed58b SIMD-accelerated fast integer forward DCT routine for MIPS DSPr2 2013-10-08 02:11:21 +00:00
DRC
01f46504ee SIMD-accelerated slow integer forward DCT and quantize routines for MIPS DSPr2 2013-09-30 18:13:27 +00:00
DRC
198cc7c161 SIMD-accelerated 3/4 and 3/2 decompression scaling for MIPS DSPr2 2013-09-27 17:51:08 +00:00
DRC
f934fc621e SIMD-accelerated 1/2 and 1/4 decompression scaling for MIPS DSPr2 2013-09-27 17:43:23 +00:00
DRC
154c2dc749 SIMD-optimized RGB-to-grayscale conversion for MIPS DSPr2 2013-09-27 17:39:57 +00:00
DRC
aa5a1808fe SIMD support for performing upsampling using MIPS DSPr2 instructions 2013-07-27 21:50:02 +00:00
DRC
3f2e3b11f0 SIMD support for performing downsampling using MIPS DSPr2 instructions 2013-07-27 21:48:18 +00:00
DRC
41e3657631 SIMD support for performing fancy upsampling using MIPS DSPr2 instructions 2013-07-27 21:44:14 +00:00
DRC
64da9d6ba8 SIMD support for performing color conversion using MIPS DSPr2 instructions 2013-07-24 21:50:20 +00:00
DRC
dbfa2648d8 Accelerated 4:2:2 upsampling routine for ARM (improves performance ~20-30% when decompressing 4:2:2 JPEGs using fancy upsampling) 2012-02-02 22:32:45 +00:00
DRC
7672bd3ac5 NEON-accelerated slow integer inverse DCT 2011-08-22 13:48:01 +00:00
DRC
00a69f142a NEON-accelerated quantization 2011-08-17 21:00:59 +00:00
DRC
22b4359e42 ARM NEON-accelerated RGB-to-YCbCr conversion 2011-08-12 19:27:20 +00:00
DRC
ce02d1d62a Support for accelerated forward DCT using ARM NEON instructions 2011-08-10 23:31:13 +00:00
DRC
e3f7e75525 NEON-optimized 2x2 and 4x4 scaled iDCTs 2011-06-17 21:12:58 +00:00
DRC
99799a6c29 ARM NEON support 2011-05-03 08:47:43 +00:00
DRC
f2cb47a275 Add short names for RGB->grayscale MMX functions 2011-02-27 09:09:54 +00:00
DRC
25299d0d2f Updated (C) 2011-02-18 20:43:04 +00:00
DRC
439527e0b9 SIMD-accelerated RGB-to-Grayscale color conversion 2011-02-18 11:23:45 +00:00
DRC
d83e1f8900 Clarify that the C wrappers fall under the same license as the rest of the SIMD code 2011-02-02 05:38:34 +00:00
DRC
b0716b6875 Add colorspace extensions to merged upsampling routines 2009-04-05 21:51:25 +00:00
DRC
f7e0f6d5f5 Implement new colorspaces to allow directly compressing from/decompressing to RGB/RGBX/BGR/BGRX/XBGR/XRGB without conversion 2009-04-03 12:00:51 +00:00
Pierre Ossman
093fe3bb51 Add SSE2 SIMD implementation of computationally intensive routines. 2009-03-09 13:34:17 +00:00
Pierre Ossman
205cdc87d4 Add SSE SIMD implementation of computationally intensive routines. 2009-03-09 13:31:56 +00:00
Pierre Ossman
9a4a8bb721 Add 3DNow SIMD implementation of computationally intensive routines. 2009-03-09 13:28:10 +00:00
Pierre Ossman
649fe159ce Add MMX SIMD implementation of computationally intensive routines. 2009-03-09 13:25:30 +00:00
Pierre Ossman
863946aebd Implement x86 SIMD framework 
Add NASM support and stub routine for detecting SIMD extensions.
 2009-03-09 13:21:27 +00:00