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Fix build with YASM

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vinserti128 requires all operands to be specified
This commit is contained in:
mayeut
2018-02-24 14:20:59 +01:00
committed by DRC
parent b6909ab3f7
commit feaec37d32
3 changed files with 6 additions and 6 deletions
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2
simd/i386/jidctint-avx2.asm
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@@ -346,7 +346,7 @@ EXTN(jsimd_idct_islow_avx2):
vpunpcklwd xmm4, xmm5, xmm5 ; xmm4=(00 00 01 01 02 02 03 03)
vpunpckhwd xmm5, xmm5, xmm5 ; xmm5=(04 04 05 05 06 06 07 07)
vinserti128 ymm4, xmm5, 1
vinserti128 ymm4, ymm4, xmm5, 1
vpshufd ymm0, ymm4, 0x00 ; ymm0=col0_4=(00 00 00 00 00 00 00 00 04 04 04 04 04 04 04 04)
vpshufd ymm1, ymm4, 0x55 ; ymm1=col1_5=(01 01 01 01 01 01 01 01 05 05 05 05 05 05 05 05)

8
simd/i386/jquanti-avx2.asm
View File

@@ -71,10 +71,10 @@ EXTN(jsimd_convsamp_avx2):
movq xmm6, XMM_MMWORD [ebx+eax*SIZEOF_JSAMPLE]
movq xmm7, XMM_MMWORD [edx+eax*SIZEOF_JSAMPLE]
vinserti128 ymm0, xmm1, 1
vinserti128 ymm2, xmm3, 1
vinserti128 ymm4, xmm5, 1
vinserti128 ymm6, xmm7, 1
vinserti128 ymm0, ymm0, xmm1, 1
vinserti128 ymm2, ymm2, xmm3, 1
vinserti128 ymm4, ymm4, xmm5, 1
vinserti128 ymm6, ymm6, xmm7, 1
vpxor ymm1, ymm1, ymm1 ; ymm1=(all 0's)
vpunpcklbw ymm0, ymm0, ymm1

2
simd/x86_64/jidctint-avx2.asm
View File

@@ -318,7 +318,7 @@ EXTN(jsimd_idct_islow_avx2):
vpunpcklwd xmm4, xmm5, xmm5 ; xmm4=(00 00 01 01 02 02 03 03)
vpunpckhwd xmm5, xmm5, xmm5 ; xmm5=(04 04 05 05 06 06 07 07)
vinserti128 ymm4, xmm5, 1
vinserti128 ymm4, ymm4, xmm5, 1
vpshufd ymm0, ymm4, 0x00 ; ymm0=col0_4=(00 00 00 00 00 00 00 00 04 04 04 04 04 04 04 04)
vpshufd ymm1, ymm4, 0x55 ; ymm1=col1_5=(01 01 01 01 01 01 01 01 05 05 05 05 05 05 05 05)