Split AltiVec algorithms into separate files for ease of maintenance; Rename constants using lowercase so they are not confused with macros
git-svn-id: svn://svn.code.sf.net/p/libjpeg-turbo/code/trunk@1463 632fc199-4ca6-4c93-a231-07263d6284db
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DRC
156
simd/jfdctfst-altivec.c
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156
simd/jfdctfst-altivec.c
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/*
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* AltiVec optimizations for libjpeg-turbo
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*
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* Copyright (C) 2014, D. R. Commander.
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* All rights reserved.
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*/
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/* FAST INTEGER FORWARD DCT
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*
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* This is similar to the SSE2 implementation, except that we left-shift the
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* constants by 1 less bit (the -1 in CONST_SHIFT.) This is because
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* vec_madds(arg1, arg2, arg3) generates the 16-bit saturated sum of:
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* the elements in arg3 + the most significant 17 bits of
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* (the elements in arg1 * the elements in arg2).
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*/
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#include "jsimd_altivec.h"
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#define F_0_382 98 /* FIX(0.382683433) */
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#define F_0_541 139 /* FIX(0.541196100) */
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#define F_0_707 181 /* FIX(0.707106781) */
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#define F_1_306 334 /* FIX(1.306562965) */
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#define CONST_BITS 8
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#define PRE_MULTIPLY_SCALE_BITS 2
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#define CONST_SHIFT (16 - PRE_MULTIPLY_SCALE_BITS - CONST_BITS - 1)
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#define DO_FDCT() \
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{ \
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/* Even part */ \
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\
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tmp10 = vec_add(tmp0, tmp3); \
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tmp13 = vec_sub(tmp0, tmp3); \
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tmp11 = vec_add(tmp1, tmp2); \
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tmp12 = vec_sub(tmp1, tmp2); \
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\
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out0 = vec_add(tmp10, tmp11); \
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out4 = vec_sub(tmp10, tmp11); \
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\
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z1 = vec_add(tmp12, tmp13); \
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z1 = vec_sl(z1, pre_multiply_scale_bits); \
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z1 = vec_madds(z1, pw_0707, zero); \
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\
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out2 = vec_add(tmp13, z1); \
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out6 = vec_sub(tmp13, z1); \
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\
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/* Odd part */ \
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\
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tmp10 = vec_add(tmp4, tmp5); \
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tmp11 = vec_add(tmp5, tmp6); \
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tmp12 = vec_add(tmp6, tmp7); \
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\
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tmp10 = vec_sl(tmp10, pre_multiply_scale_bits); \
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tmp12 = vec_sl(tmp12, pre_multiply_scale_bits); \
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z5 = vec_sub(tmp10, tmp12); \
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z5 = vec_madds(z5, pw_0382, zero); \
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\
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z2 = vec_madds(tmp10, pw_0541, z5); \
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z4 = vec_madds(tmp12, pw_1306, z5); \
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\
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tmp11 = vec_sl(tmp11, pre_multiply_scale_bits); \
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z3 = vec_madds(tmp11, pw_0707, zero); \
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\
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z11 = vec_add(tmp7, z3); \
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z13 = vec_sub(tmp7, z3); \
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\
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out5 = vec_add(z13, z2); \
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out3 = vec_sub(z13, z2); \
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out1 = vec_add(z11, z4); \
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out7 = vec_sub(z11, z4); \
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}
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void
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jsimd_fdct_ifast_altivec (DCTELEM *data)
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{
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__vector short row0, row1, row2, row3, row4, row5, row6, row7,
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col0, col1, col2, col3, col4, col5, col6, col7,
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tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp10, tmp11, tmp12, tmp13,
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z1, z2, z3, z4, z5, z11, z13,
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out0, out1, out2, out3, out4, out5, out6, out7;
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/* Constants */
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__vector short zero = vec_splat_s16(0),
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pw_0382 = { __8X(F_0_382 << CONST_SHIFT) },
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pw_0541 = { __8X(F_0_541 << CONST_SHIFT) },
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pw_0707 = { __8X(F_0_707 << CONST_SHIFT) },
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pw_1306 = { __8X(F_1_306 << CONST_SHIFT) };
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__vector unsigned short
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pre_multiply_scale_bits = { __8X(PRE_MULTIPLY_SCALE_BITS) };
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/* Pass 1: process rows. */
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row0 = *(__vector short *)&data[0];
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row1 = *(__vector short *)&data[8];
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row2 = *(__vector short *)&data[16];
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row3 = *(__vector short *)&data[24];
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row4 = *(__vector short *)&data[32];
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row5 = *(__vector short *)&data[40];
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row6 = *(__vector short *)&data[48];
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row7 = *(__vector short *)&data[56];
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TRANSPOSE(row, col);
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tmp0 = vec_add(col0, col7);
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tmp7 = vec_sub(col0, col7);
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tmp1 = vec_add(col1, col6);
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tmp6 = vec_sub(col1, col6);
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tmp2 = vec_add(col2, col5);
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tmp5 = vec_sub(col2, col5);
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tmp3 = vec_add(col3, col4);
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tmp4 = vec_sub(col3, col4);
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DO_FDCT();
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/* Pass 2: process columns. */
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TRANSPOSE(out, row);
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tmp0 = vec_add(row0, row7);
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tmp7 = vec_sub(row0, row7);
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tmp1 = vec_add(row1, row6);
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tmp6 = vec_sub(row1, row6);
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tmp2 = vec_add(row2, row5);
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tmp5 = vec_sub(row2, row5);
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tmp3 = vec_add(row3, row4);
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tmp4 = vec_sub(row3, row4);
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DO_FDCT();
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*(__vector short *)&data[0] = out0;
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*(__vector short *)&data[8] = out1;
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*(__vector short *)&data[16] = out2;
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*(__vector short *)&data[24] = out3;
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*(__vector short *)&data[32] = out4;
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*(__vector short *)&data[40] = out5;
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*(__vector short *)&data[48] = out6;
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*(__vector short *)&data[56] = out7;
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}
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