ryan/mozjpeg
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Reformat jsimdcpu[-64].asm to improve readability

Browse Source
This commit is contained in:
DRC
2016-07-11 19:42:37 -05:00
parent b331385e8a
commit 1be87b6273
2 changed files with 87 additions and 87 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
simd/jsimdcpu-64.asm
View File

@@ -20,8 +20,8 @@
%include "jsimdext.inc" %include "jsimdext.inc"
; -------------------------------------------------------------------------- ; --------------------------------------------------------------------------
SECTION SEG_TEXT SECTION SEG_TEXT
BITS 64 BITS 64
; ;
; Check if the CPU supports SIMD instructions ; Check if the CPU supports SIMD instructions
; ;
@@ -29,34 +29,34 @@
; jpeg_simd_cpu_support (void) ; jpeg_simd_cpu_support (void)
; ;
align 32 align 32
global EXTN(jpeg_simd_cpu_support) global EXTN(jpeg_simd_cpu_support)
EXTN(jpeg_simd_cpu_support): EXTN(jpeg_simd_cpu_support):
push rbx push rbx
push rdi push rdi
xor rdi,rdi ; simd support flag xor rdi, rdi ; simd support flag
; Check for AVX2 instruction support ; Check for AVX2 instruction support
mov rax, 7 mov rax, 7
xor rcx,rcx xor rcx, rcx
cpuid cpuid
mov rax,rbx ; rax = Extended feature flags mov rax, rbx ; rax = Extended feature flags
or rdi, JSIMD_SSE2 or rdi, JSIMD_SSE2
or rdi, JSIMD_SSE or rdi, JSIMD_SSE
test rax, 1<<5 ; bit5:AVX2 test rax, 1<<5 ; bit5:AVX2
jz short .return jz short .return
or rdi, JSIMD_AVX2 or rdi, JSIMD_AVX2
.return: .return:
mov rax,rdi mov rax, rdi
pop rdi pop rdi
pop rbx pop rbx
ret ret
; For some reason, the OS X linker does not honor the request to align the ; For some reason, the OS X linker does not honor the request to align the
; segment unless we do this. ; segment unless we do this.
align 32 align 32

130
simd/jsimdcpu.asm
View File

@@ -19,8 +19,8 @@
%include "jsimdext.inc" %include "jsimdext.inc"
; -------------------------------------------------------------------------- ; --------------------------------------------------------------------------
SECTION SEG_TEXT SECTION SEG_TEXT
BITS 32 BITS 32
; ;
; Check if the CPU supports SIMD instructions ; Check if the CPU supports SIMD instructions
; ;
@@ -28,88 +28,88 @@
; jpeg_simd_cpu_support (void) ; jpeg_simd_cpu_support (void)
; ;
align 32 align 32
global EXTN(jpeg_simd_cpu_support) global EXTN(jpeg_simd_cpu_support)
EXTN(jpeg_simd_cpu_support): EXTN(jpeg_simd_cpu_support):
push ebx push ebx
; push ecx ; need not be preserved ; push ecx ; need not be preserved
; push edx ; need not be preserved ; push edx ; need not be preserved
; push esi ; unused ; push esi ; unused
push edi push edi
xor edi,edi ; simd support flag xor edi, edi ; simd support flag
pushfd pushfd
pop eax pop eax
mov edx,eax mov edx, eax
xor eax, 1<<21 ; flip ID bit in EFLAGS xor eax, 1<<21 ; flip ID bit in EFLAGS
push eax push eax
popfd popfd
pushfd pushfd
pop eax pop eax
xor eax,edx xor eax, edx
jz short .return ; CPUID is not supported jz short .return ; CPUID is not supported
; Check for MMX instruction support ; Check for MMX instruction support
xor eax,eax xor eax, eax
cpuid cpuid
test eax,eax test eax, eax
jz short .return jz short .return
xor eax,eax xor eax, eax
inc eax inc eax
cpuid cpuid
mov eax,edx ; eax = Standard feature flags mov eax, edx ; eax = Standard feature flags
test eax, 1<<23 ; bit23:MMX test eax, 1<<23 ; bit23:MMX
jz short .no_mmx jz short .no_mmx
or edi, byte JSIMD_MMX or edi, byte JSIMD_MMX
.no_mmx: .no_mmx:
test eax, 1<<25 ; bit25:SSE test eax, 1<<25 ; bit25:SSE
jz short .no_sse jz short .no_sse
or edi, byte JSIMD_SSE or edi, byte JSIMD_SSE
.no_sse: .no_sse:
test eax, 1<<26 ; bit26:SSE2 test eax, 1<<26 ; bit26:SSE2
jz short .no_sse2 jz short .no_sse2
or edi, byte JSIMD_SSE2 or edi, byte JSIMD_SSE2
.no_sse2: .no_sse2:
; Check for AVX2 instruction support ; Check for AVX2 instruction support
mov eax, 7 mov eax, 7
xor ecx,ecx xor ecx, ecx
cpuid cpuid
mov eax,ebx mov eax, ebx
test eax, 1<<5 ; bit5:AVX2 test eax, 1<<5 ; bit5:AVX2
jz short .no_avx2 jz short .no_avx2
or edi, JSIMD_AVX2 or edi, JSIMD_AVX2
.no_avx2: .no_avx2:
; Check for 3DNow! instruction support ; Check for 3DNow! instruction support
mov eax, 0x80000000 mov eax, 0x80000000
cpuid cpuid
cmp eax, 0x80000000 cmp eax, 0x80000000
jbe short .return jbe short .return
mov eax, 0x80000001 mov eax, 0x80000001
cpuid cpuid
mov eax,edx ; eax = Extended feature flags mov eax, edx ; eax = Extended feature flags
test eax, 1<<31 ; bit31:3DNow!(vendor independent) test eax, 1<<31 ; bit31:3DNow!(vendor independent)
jz short .no_3dnow jz short .no_3dnow
or edi, byte JSIMD_3DNOW or edi, byte JSIMD_3DNOW
.no_3dnow: .no_3dnow:
.return: .return:
mov eax,edi mov eax, edi
pop edi pop edi
; pop esi ; unused ; pop esi ; unused
; pop edx ; need not be preserved ; pop edx ; need not be preserved
; pop ecx ; need not be preserved ; pop ecx ; need not be preserved
pop ebx pop ebx
ret ret
; For some reason, the OS X linker does not honor the request to align the ; For some reason, the OS X linker does not honor the request to align the
; segment unless we do this. ; segment unless we do this.
align 32 align 32